The invention relates generally to signal analysis instruments and, more specifically, to a method and apparatus providing enhanced data communications measurements.
Signal acquisition devices such as digital storage oscilloscopes (DSOs) and the like are commonly used for a variety of timing measurements during the testing of telecommunications and data communications (telecom/datacom) SIGNALS. Common tests performed on telecom/datacom signals include the generation of eye diagrams, mask testing and time interval error (TIE) testing. These tests are performed using dedicated hardware and software within the DSO. If the data/clock signals are accurate, then the tests work well.
An eye diagram is a visual overlay of multiple data symbols that are aligned in time on a display device. Mask tests are similar to eye diagrams where only selected bit sequences are overlaid. Eye diagrams and mask tests contemporaneously display multiple short waveform segments. Typically, the time alignment for each segment comes from triggering on a data signal edge. The TIE test is a skew (i.e., delay) measurement between the edges of the sampled signal (i.e., clock or data signal) and the edges of a reference signal (i.e., data or clock signal). TIE is typically a measurement made on real-time acquisitions, and reference clock or data edges come from a xe2x80x9cbest fitxe2x80x9d calculation of an ideal clock derived from the sampled signal.
A useful reference signal for many telecom-timing measurements is the recovered clock from a Phase-Locked Loop (PLL). Many telecom/datacom standards (e.g., FibreChannel) utilize PLL clock/data recovery as part of the specifications. Since the recovered clock/data is used as the ideal clock/data in telecom/datacom implementations, timing errors (i.e., Jitter) relative to the recovered clock are more appropriate than timing errors relative to some other reference. A recovered clock signal from an external hardware PLL clock/data recovery circuit may be used to trigger the acquisition and display (e.g., eye diagram generation) of data received via a first oscilloscope input channel as well as be used as reference clock signal for TIE measurement (via input of the clock signal input to a second oscilloscope input channel). Internal hardware PLL clock/data recovery circuit has been implemented for trigger, but not suitable for TIE measurements since the recovered clock is not recorded.
These and other deficiencies of the prior art are addressed by the present invention of a method and apparatus for recovering a clock component of a data signal using a phase locked loop to a test and measurement device.
Specifically, an apparatus according to one embodiment of the invention comprises an acquisition unit, for acquiring at least a portion of a data signal in response to a trigger signal and providing therefrom an acquired sample stream; a controller, including a memory for storing a phase locked loop (PLL) program, a processor for executing the PLL program, and an input/output (I/O) circuit or program interface for receiving the acquired sample stream for use by the PLL programs and responsively providing a clock signal recovered using the PLL program.